Events

Thursday, 28. November 2019, 10:00-11:00 in CAB E 72

Speaker: Djordje Zegarac and Martin Marciniszyn (Tensor Technologies)

Title: High Frequency Trading and FPGAs 

Abstract:

High-Frequency Trading (HFT) platforms were typically implemented in software on traditional CPUs with high performance network adapters. However, the industry-wide race to "Zero Latency" has led the trading world to explore alternative system architectures that would minimize the internal latency. Field-Programmable Gate Arrays (FPGAs) offer the superior performance with deterministic execution while providing custom implementation flexibility. Due to these valuable architectural properties FPGAs became the integral part of HFT industry in accelerating trading solutions and reducing wire to wire latencies. In this talk we are going to outline the general architecture of our system and describe the main design challenges.

Bio:

Djordje Zegarac received the B.Sc. degree in Electrical Engineering from the University of Calgary, Canada in 2011, the M.Sc. degree in Electronics and Microelectronics from Ecole Polytechnique Fédérale de Lausanne and IBM Research, Switzerland in 2014. He worked as an IC Digital Design Engineer at u-blox, and as FPGA SoC Development Engineer at Enclustra, Switzerland. Currently, he is employed by Tensor Technologies as an FPGA Engineer. His main research interest is in the area of ASIC/FPGA design and hardware acceleration.

Martin Marciniszyn received a Ph.D. in Computer Science from ETH Zurich in 2007. Afterwards he spent the largest part of his professional career as a quant researcher at IMC Trading, one of the largest global HFT companies. Currently, he is the CTO of Tensor Technologies.

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